Rust Backend Engineer (Mid to Senior)

On-site: Yerevan, Armenia | Full-time | Tauri Desktop Backend + Linux Device Software + NVIDIA Jetson Platform

Note: This position is on-site in Yerevan; we are not considering remote candidates at this time.

Location	Yerevan, Armenia (on-site)
Level	Mid to Senior
Primary language	Rust (or C/C++ with strong motivation to transition to Rust)
Focus	Orchestration across desktop app, device (PetaLinux/FPGA), and NVIDIA Jetson AI compute (PCI Express integration)
Product domain	Industrial automation / AI+Control platform (FPGA-backed)

Role overview

You will develop the Rust backend that powers our Tauri desktop application, the Linux device-side Rust application that orchestrates data and behavior with the FPGA, and the Jetson-side software layer that enables customers to run their own AI models. This is a backend engineering role focused on performance, reliability, and clean systems design in resource-constrained environments.

We do not build customer AI algorithms; we build the infrastructure and interfaces around them (deployment, data access, and command/telemetry exchange). A key part of the role is designing and implementing robust communication between Jetson and the control domain (PetaLinux/FPGA), primarily over PCI Express.

If you are a strong C++ engineer who has been wanting to move to Rust (or already started), we are open to that path.

What you will build

A high-performance Rust backend for our Tauri desktop application (local services, APIs, state, diagnostics).
A Linux device-side Rust application responsible for orchestration between the host application and the FPGA.
Jetson-side Linux services and SDK that let customers deploy/run their AI models and exchange commands and telemetry with the control domain over PCI Express.
A clean integration layer between Jetson workloads and the rest of the platform (data schemas, APIs, lifecycle management, observability).
Core runtime components such as a sequencer, rule engine, data acquisition and logging pipeline, and health monitoring.
Robust, testable interfaces around high-throughput communication (e.g., shared memory, messaging, RPC) and device telemetry.
Performance tooling: profiling, benchmarks, and strategies to optimize memory and CPU usage under load.

Responsibilities

Design and implement backend services and core libraries in Rust with a strong focus on correctness, performance, and maintainability.
Model and implement a reliable orchestration layer that coordinates commands, sequencing, and safety/guard logic across components.
Build and evolve data pipelines for streaming, buffering, and persistent logging of device and machine data.
Collaborate closely with FPGA and hardware engineers to define interfaces and validate end-to-end behavior.
Design and implement the Jetson-side system architecture (services, APIs, and tooling) that enables customer models to run reliably and communicate with the control domain over PCI Express.
Define and maintain clear contracts between domains (Jetson, device, FPGA): message formats, versioning, and failure handling.
Write tests (unit/integration), improve observability (logging/metrics/tracing), and participate in code reviews.
Own features end-to-end: from design and implementation to debugging in real devices and production-like environments.
Work AI-native: leverage AI-assisted development tools and workflows (including ‘vibe coding’) to solve complex problems faster, while remaining accountable for correctness, security, and maintainability of every commit.

Technology (relevant to this role)

Rust, Tauri
Linux (device-side), embedded Linux distributions such as PetaLinux
NVIDIA Jetson (JetPack/Linux for Tegra) for AI compute integration and edge deployment workflows
PCI Express communication between Jetson and the control domain (PetaLinux/FPGA), including high-rate data exchange and command channels
High-throughput communication patterns (shared memory with FPGA, messaging, RPC)
gRPC / Protobuf; message bus technologies such as NATS (experience is a plus)
CI/CD and engineering tooling (we value automated tests and reproducible builds)

Required qualifications

Strong engineering fundamentals: algorithms, data structures, and writing clean, maintainable code.
Proficiency in Rust OR strong professional experience in C/C++ with a clear willingness to transition primarily to Rust.
Hands-on experience building backend systems where performance matters (CPU/memory), including profiling and optimization.
Solid Linux skills: processes, filesystems, networking fundamentals, and practical debugging (gdb/lldb, perf, strace, etc.).
Experience integrating multiple Linux subsystems/services in a single product (e.g., Jetson-class devices, SBCs, or hardware-adjacent systems) and designing reliable inter-process/device communication.
Experience with concurrency and synchronization; comfort reasoning about correctness and performance in multi-threaded systems.

Nice to have

Experience with async Rust (Tokio/async-std), channels, and event-driven architectures.
Experience with gRPC/Protobuf, message buses (e.g., NATS), or other low-latency communication patterns.
Experience with Tauri, desktop application backends, or cross-platform product development.
Experience working with embedded Linux distributions (e.g., PetaLinux) and hardware-adjacent systems.
Familiarity with trace-based debugging, structured logging, metrics, and production-grade observability.
Experience developing on NVIDIA Jetson (JetPack), and deploying services/models on the edge (e.g., Docker, systemd)
Experience with ROS/ROS2 integration patterns (bridges, message translation, device drivers orchestration) is a plus.

What success looks like

You can build, run, and debug the desktop backend, the Linux device application, and the Jetson-side stack end-to-end.
Jetson <-> control-domain communication (PCI Express) is reliable under load, with clear interfaces, versioning, and good observability for debugging.
You deliver a meaningful improvement to orchestration reliability or performance (sequencing, rules, or logging).
You introduce (or improve) at least one profiling/benchmarking workflow that helps the team keep performance regressions under control.
You become a trusted collaborator for FPGA/software integration topics.

Why join TACTUN

You will work on a deep-tech product that sits at the intersection of software, hardware, and industrial automation. This role offers meaningful ownership, challenging performance constraints, and direct exposure to real machines in the field.

Build systems that interact with real hardware and must be correct, fast, and reliable.
Work with a modern stack (Rust, Tauri, Linux, FPGA-backed deterministic control).
High ownership: you will help define architecture, not just implement tickets.
A collaborative on-site engineering team in Yerevan.

Interview process

Intro call to align on role expectations and what you want to build next.
Technical interview (Rust or C/C++): systems design + problem solving + performance reasoning.
Practical exercise or take-home (time-boxed) focused on real-world Rust backends or data orchestration patterns.
On-site meeting with the team to discuss architecture, collaboration style, and the product.

How to apply

Share your CV (or LinkedIn), and optionally your GitHub/portfolio or any projects that demonstrate systems work, performance optimization, or hardware-adjacent development to join@tactun.com. If you are coming from C/C++, include a brief note on your motivation to transition to Rust.

Equal opportunity

TACTUN is an equal opportunity employer. We consider all candidates without regard to race, color, religion, sex, national origin, age, disability, veteran status, or any other legally protected status.